Design and Tool Flow of Multimedia MPSoC Platforms

This paper surveys components that are useful to build programmable, predictable, composable, and scalable multiprocessor-system-on-a-chip (MPSoC) multimedia platforms that can deliver high performance at high power-efficiency. A design-time tool flow is proposed to exploit all forms of parallelism on such platforms. As a first proof of concept, the flow is used to parallelize a relatively simple video standard on a platform consisting of off-the-shelf components. As a second proof of concept, we present the design of a high-performance platform with state-ofthe-art components. This platform targets real-time H.264 high-definition video encoding at an estimated power consumption of 700mW. We rewrote the abstract as asked. * Response to Reviewer Comments